The present invention relates to a method and system for low power precision timing, in general and to a method and a device for providing improved power consumption, while maintaining precise timing, of a communication system in waiting mode, in particular.
Methods and devices for providing precise timing and precise time counting are known in the art. Such devices conventionally include a crystal for providing a basic frequency and a controller for accumulating the clock signals generated by the crystal. When such a system attempts to increase the accuracy of the counting mechanism, it utilizes a high frequency crystal which increases the resolution in time.
It would be appreciated that frequency and energy are associated in a way that producing a higher frequency requires higher power to be provided thereto. The basic quantum rule is presented by the expression:
E=hxc2x7f
wherein E represents energy, h represents Planck""s coefficient and f represents frequency.
In CMOS design, the following expression is used:
P=Cxc2x7V2xc2x7f
wherein P represents power, C represents capacity and V represents voltage.
Methods for managing power of a communication system in waiting mode are known in the art. A conventional communication system, in waiting mode has to detect hailing signals and open a communication channel when it detects a hailing signal which is addressed thereto.
Conventional communication protocols, such as TDMA, determine time periods in which hailing signals are transmitted. State of the art communication systems, attempt to shut down their receiver, when out of these time periods, so as to save power. Such systems are described in U.S. Pat. No. 5,568,513 to Croft et al. and U.S. Pat. No. 5,224,152 to Harte.